Method of controlling a step-up DC-DC converter and related converter

ABSTRACT

A method of controlling a DC-DC step-up converter including at least one power switch and an energy storage inductor may include comparing a converter output voltage to a first threshold and generating a first comparison flag based on the converter output voltage comparison. The method may also include comparing a voltage across the energy storage inductor to a second threshold and generating a second comparison flag based on the second energy storage inductor voltage comparison. The method may further include controlling the at least one power switch as a function of a logic state of the first comparison flag and the second comparison flag, and stepwise adjusting the second threshold as a function of the first comparison flag and the second comparison flag to limit a ripple on the converter output voltage.

FIELD OF THE INVENTION

This invention relates to voltage converters and, more particularly, toa method of controlling a step-up DC-DC converter and a relatedconverter.

BACKGROUND OF THE INVENTION

The amplitude of the ripple of the output voltage of a DC-DC converterdepends on the characteristics of the load supplied by the converter andon the maximum current that may flow through the step-up inductor. FIG.1 illustrates a typical functioning scheme of a hysteretic step-upconverter. With this type of control, the switch N₁ is turned on and offwith a certain fixed duty-cycle δ as long as FB<FB_(REF),

$\delta = \frac{T_{ON}}{T_{ON} + T_{OFF}}$T_(ON) being the duration of the charge phase, and T_(OFF) being theduration of the discharge phase of the inductor. Usually, the maximumduration of the charge phase T_(ON), and the minimum duration of thedischarge phase T_(OFF) are pre-established.

A feedback voltage FB, representative of the output voltage (in thedepicted case it is generated by a voltage divider), is compared with areference value FB_(REF). When the feedback voltage increases and thecondition FB=FB_(REF) is met, the switch N₁ is turned off, and energystored up to that moment in the inductor is discharged into the load.After the inductor has discharged, the system remains in a stand-bystate until FB<FB_(REF).

The control block CONTROL turns the switch N₁ as a function of a firstcomparison flag FB_(COMP) and of a second comparison flag OCP_(COMP)generated by comparing the voltage LX on the inductor (that isproportional to the current that flows therethrough) with a secondreference voltage OCP_(REF).

The current through the inductor is constantly monitored such thatduring the phase it increases (T_(ON)), the current does not overcome apre-established threshold (proportional to the voltage OCP_(REF)), suchas to limit the input current and preventing the inductor fromsaturating. Should this happen, the conduction phase of the switch N₁ isimmediately stopped and the inductor discharges completely. Typicalwaveforms of the inductor current are illustrated in FIG. 2, forexample.

Usually, the duty-cycle δ is a design parameter tied only to V_(IN) andV_(OUT) (and not to the load current) according to the formula:

$\delta = {{1 - {\frac{V_{IN}}{V_{OUT}}{\mspace{11mu}\;}{or}\mspace{14mu} V_{OUT}}} = \frac{V_{IN}}{1 - \delta}}$The value of δ as well as the maximum current that may flow through theinductor influence the amplitude of the ripple and the efficiency of theconverter. The advantage of this type of hysteretic control is itssimplicity, since it does not typically require error amplifiers, noraccurate compensations.

As shown in FIG. 3, if the supply voltage V_(IN) is significantlysmaller than the output voltage V_(OUT), the inductor current increasesslowly during the charge phase T_(ON) and discharges fast during thedischarge phase T_(OFF) (this time is also fixed). If, by contrast, thesupply voltage V_(IN) is almost equal to the voltage V_(OUT), thecurrent increases fast during the T_(ON) phase and discharges slowlyduring the T_(OFF) phase. This causes an abrupt increase of the peakcurrent through the inductor upon reaching the maximum current I_(MAX)that may flow through the inductor. With the same output voltageV_(OUT), the slope of the current through the inductor is proportionalto the supply voltage V_(IN) during the charge phase T_(ON), and toV_(OUT)-V_(IN) during the discharge phase T_(OFF).

The performance of the converter depends on the external load and on thesupply. In particular, there may be functioning conditions in which theoutput voltage ripple and the dissipated power become relatively large.

SUMMARY OF THE INVENTION

Investigations carried out by the applicant lead to infer that bothproblems are due to, or worsened by, the occurrence of large currentpeaks flowing through the inductor. The fact that the inductor is alwayscharged as much as possible independently of the load being suppliedcould explain, at least partially, the observed decrement ofperformance.

Energy stored in the inductor is proportional to the current, thus, assoon as FB≧FB_(REF), the inductor discharges completely on the outputtank capacitance causing a relatively large voltage ripple. Also, theincrease of the peak current through the inductor causes a larger meansquare value of the input current, thus causing an abrupt increase ofpower losses in the power switch, with a consequent reduction ofconversion efficiency.

According to an embodiment, to overcome these shortcomings, the value ofthe maximum current through the inductor is increased stepwise to attaina maximum pre-established value. A relatively low current threshold isthus set in the presence of a load that absorbs a relatively smallcurrent and a higher current threshold when the load absorbs arelatively large current.

According to an embodiment implemented in a related converter, theoutput voltage of the converter and the inductor voltage are comparedwith respective thresholds. Thus, depending on the result of thesedistinct comparisons, the ripple of the output voltage of the converteris limited by adjusting the comparison threshold of the inductorvoltage.

According to an embodiment, the number of occurrences of the outputvoltage of the converter reaching its respective threshold is downcounted and the number of occurrences of the inductor voltage reachingits respective threshold is up-counted. When the resulting count attainsa certain value, the comparison threshold of the inductor voltage isincremented, and the counting is reset.

BRIEF DESCRIPTION OF THE DRAWINGS

FIG. 1 illustrates a schematic block diagram of a hysteretic controllerwith fixed duty-cycle as in the prior art;

FIG. 2 illustrates waveforms of the main signal of the controller ofFIG. 1;

FIG. 3 illustrates waveforms of the current through the inductor of thecontroller of FIG. 1 for two different output voltages;

FIG. 4 is a schematic block diagram of a DC-DC step-up converter of thisinvention;

FIG. 5 illustrates sample waveforms of the current through the inductorof a DC-DC step-up controller according to the method of this invention;

FIG. 6 illustrates a first embodiment of a controller of this invention;

FIG. 7 illustrates a second embodiment of a controller of thisinvention; and

FIG. 8 illustrates waveforms of the main signal of the controllers ofFIGS. 6 and 7.

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

For sake of clarity, hereinafter reference will be made to a hystereticstep-up converter controlled in pulse frequency modulation (PFM) mode,though the same considerations hold for a different pulse widthmodulation-like (PWN) type of control.

To achieve a low ripple and high efficiency for a large range of inputvoltages, output voltages, and load currents, according to anembodiment, the comparison threshold of the current through the inductoris adjusted as a function of the comparison flags FB_(COMP) andOCP_(COMP), as schematically illustrated in FIG. 4.

Preferably, different levels of current limitations are established upto a maximum level I_(MAX). For example, it is possible to set m=4uniformly spaced current thresholds.

As shown in FIG. 5, when FB<FB_(REF), the device starts switching withthe fixed duty-cycle, but with a current limitation determined by thefirst threshold I_(MAX) 01. A certain number of switchings (for examplen=3) is counted. If the condition FB<FB_(REF) continues to be verified,the next larger current threshold I_(MAX) 02 is chosen and so forthuntil FB=FB_(REF). This increases the switching frequency of the device,thus achieving a higher energy transfer from the input to the outputwith current peaks through the inductor that remain smaller than inprior art circuits.

As soon as FB=FB_(REF) the inductor is discharged on the load with acurrent smaller than the maximum threshold, and the last currentlimitation threshold setting is recorded. When again FB<FB_(REF), thedevice will start switching again with a current limitation thresholdset at the immediately smaller level than the level of the recorded lastcurrent limitation threshold.

With such a control, the device adjusts the control to the load beingsupplied. If the peak current through the inductor is excessively small,it is stepwise increased for ensuring a sufficient output current orstepwise decreased if too large. The advantage is that the peak currentthrough the inductor will be adjusted to the lowest possible valuecompatible to load conditions. Therefore, the ripple and the switchinglosses tied to the mean square of the current are reduced.

Two sample embodiments of the DC-DC step-up converter are illustrated inFIGS. 6 and 7, and the graphs of the relative main signals of theconverter are illustrated in FIG. 8.

Turning now to FIG. 6, a DC-DC step-up converter 10 illustrativelyincludes a first comparator 11 to compare a signal representing aconverter output voltage with a first threshold, and to generate a firstcomparison flag based on the converter output voltage signal comparison.The DC-DC step-up converter 10 also includes a second comparator 12 tocompare a signal representing a voltage across an energy storageinductor 13 with a second threshold, and to generate a second comparisonflag based on the energy storage inductor signal comparison. A powerswitch control circuit 14 has inputs 15 to receive the first comparisonflag and second comparison flag and to control at least one power switch16. A circuit 17 to establish the second threshold and has inputs 21 toreceive the first comparison flag and second comparison flag and toadjust the second threshold as a function of the first and secondcomparison flags.

The circuit 17 also illustratively includes an up-down counter 22 toup-count logically active edges of the second comparison flag and todown-count logically active edges of the first comparison flag and anincrementing circuit 19 that increments the second threshold when theup-down counter counts a pre-established number of logically activeedges. The incrementing circuit 19 illustratively includes a resistors24 a-24 d coupled in series, and shunt switches 25 a-25 c coupledbetween the resistors. A current generator 26 is coupled to force acurrent through the resistors 24 a-24 d. A control circuit 27 closes theshunt switch when the up-down counter 22 has counted the pre-establishednumber of active edges.

An external digital counter and additional switches may be added to thestep-up converter 10 without introducing any static current dissipatingcircuits. This feature is important for forming converters with reducedstand-by power consumptions.

Referring additionally to FIG. 7, another embodiment of the DC-DCstep-up converter 10 is illustrated. In this embodiment, the resistors24 a-24 d are illustratively replaced with transistors 24 a′-24 d′.

The embodiments described herein may be effective for controlling thepeak current through the inductor as a function of the load current,without any complex control loop and external compensation components.

1. A method of controlling a DC-DC step-up converter including at leastone power switch and an energy storage inductor, comprising: comparing asignal representing a converter output voltage to a first threshold;generating a first comparison flag based on the converter output voltagecomparison; comparing a signal representing a voltage across the energystorage inductor to a second threshold; generating a second comparisonflag based on the energy storage inductor voltage comparison;controlling the at least one power switch based upon the firstcomparison flag and the second comparison flag; and stepwise adjustingthe second threshold based upon the first comparison flag and the secondcomparison flag to limit a ripple on the converter output voltage. 2.The method of claim 1, wherein stepwise adjusting comprises:down-counting logically active edges of the first comparison flag;up-counting logically active edges of the second comparison flag;incrementing the second threshold by a pre-established step when thecounting reaches a value; and resetting the counting when the countingreaches the value.
 3. The method of claim 2, wherein the secondthreshold has a maximum value.
 4. The method of claim 2, furthercomprising: storing a value of the second threshold when the firstcomparison flag switches to logically active; discharging the energystorage inductor when the first comparison flag switches to logicallyactive; down-counting logically active edges of the first comparisonflag; up-counting logically active edges of the second comparison flag;setting the second threshold to the stored value minus onepre-established step; incrementing the second threshold by thepre-established step when the counting equals the value; and resettingthe counting when the counting reaches the value.
 5. A DC-DC step-upconverter comprising: a first comparator to compare a signalrepresenting a converter output voltage with a first threshold, and togenerate a first comparison flag based on the converter output voltagesignal comparison; a second comparator to compare a signal representingvoltage across an energy storage inductor with a second threshold, andto generate a second comparison flag based on the energy storageinductor signal comparison; a power switch control circuit having inputsto receive the first comparison flag and second comparison flag and tocontrol at least one power switch; and a circuit to establish the secondthreshold, the circuit having inputs to receive the first comparisonflag and second comparison flag and to adjust the second threshold as afunction of the first and second comparison flags.
 6. The DC-DC step-upconverter of claim 5, wherein said circuit is for stepwise adjusting thesecond threshold based upon the first comparison flag and the secondcomparison flag to limit a ripple on the converter output voltage. 7.The DC-DC step-up converter of claim 5, wherein said power switchcontrol circuit inputs control the at least one power switch accordingto a pulse frequency modulation (PFM) technique.
 8. The DC-DC step-upconverter of claim 5, wherein said circuit comprises: an up-down counterto up-count logically active edges of the second comparison flag and todown-count logically active edges of the first comparison flag; anincrementing circuit to increment the second threshold when said up-downcounter counts a pre-established number of logically active edges. 9.The DC-DC step-up converter of claim 8, wherein said incrementingcircuit comprises: a plurality of resistors coupled in series; a shuntswitch coupled to at least one of said plurality of resistors; a currentgenerator coupled to force a current through said plurality ofresistors; and a control circuit to close said shunt switch when saidup-down counter has counted the pre-established number of active edges.10. A DC-DC step-up converter comprising: at least one power switch; anenergy storage inductor; a first comparator to compare a signalrepresenting a converter output voltage with a first threshold, and togenerate a first comparison flag based on the converter output voltagesignal comparison; a second comparator to compare a signal representinga voltage across said energy storage inductor with a second threshold,and to generate a second comparison flag based on the energy storageinductor signal comparison; a power switch control circuit having inputsto receive the first comparison flag and second comparison flag and tocontrol said at least one power switch; and a circuit to establish thesecond threshold, the circuit having inputs to receive the firstcomparison flag and second comparison flag and to adjust the secondthreshold as a function of the first and second comparison flags. 11.The DC-DC step-up converter of claim 10, wherein said circuit is forstepwise adjusting the second threshold based upon the first comparisonflag and the second comparison flag to limit a ripple on the converteroutput voltage.
 12. The DC-DC step-up converter of claim 10, whereinsaid power switch control circuit inputs control the at least one powerswitch according to a pulse frequency modulation (PFM) technique. 13.The DC-DC step-up converter of claim 10, wherein said circuit comprises:an up-down counter to up-count logically active edges of the secondcomparison flag and to down-count logically active edges of the firstcomparison flag; an incrementing circuit to increment the secondthreshold when said up-down counter counts a pre-established number oflogically active edges.
 14. The DC-DC step-up converter of claim 13,wherein said incrementing circuit comprises: a plurality of resistorscoupled in series; a shunt switch coupled to at least one of saidplurality of resistors; a current generator coupled to force a currentthrough said plurality of resistors; and a control circuit to close saidshunt switch when said up-down counter has counted the pre-establishednumber of active edges.